Efficient realization of reconfigurable FIR filter using the new coefficient representation
| Autor: | Khosrov Dabbagh Sadeghipour, Asgar Abbaszadeh |
|---|---|
| Rok vydání: | 2011 |
| Předmět: |
Finite impulse response
Computer science Filter (video) Binary number Parallel computing State (computer science) Hardware_ARITHMETICANDLOGICSTRUCTURES Electrical and Electronic Engineering Condensed Matter Physics Field-programmable gate array Representation (mathematics) Realization (systems) Electronic Optical and Magnetic Materials |
| Zdroj: | IEICE Electronics Express. 8:902-907 |
| ISSN: | 1349-2543 |
| DOI: | 10.1587/elex.8.902 |
| Popis: | In this paper, efficient reconfigurable finite-impulse response (FIR) filter architecture is presented based on a new coefficient representation method. The proposed binary signed subcoefficient method increases the common subexpressions and decrease the hardware usage and complexity. FPGA synthesis results of the designed two reconfigurable FIR filter architectures show that 33% and 27% reductions in the resources usage are achievable over the previously reported two state of the art reconfigurable architectures. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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