Autor: |
Paul F. Joseph, James D. Meindl, Todd J. Spencer, Hiren D. Thacker, B. Dang, D.C. Sekar, Muhannad S. Bakir, Calvin King |
Rok vydání: |
2008 |
Předmět: |
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Zdroj: |
2008 International Interconnect Technology Conference. |
DOI: |
10.1109/iitc.2008.4546911 |
Popis: |
A 3D-IC technology with integrated microchannel cooling is demonstrated in this paper. Fluidic interconnect network fabrication proceeds at the wafer-level, is compatible with CMOS processing and flip-chip assembly and requires four lithography steps. Measurements for single chips prior to 3D stacking reveal that each die in a two chip 3D stack may potentially exhibit a junction-to-ambient thermal resistance of 0.24°C/W. The demonstrated silicon die contain a through-silicon copper via density of 2500/cm2 integrated within the microchannel heat sink. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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