| Popis: |
Subcircuit Extraction plays an important role in Computer-Aided-Design of digital circuits. With the rapid growth of wafer processing technologies, the integration is from very large scale to giga large scale. Therefore, to extract sub circuits from such large scale integration is computation-consuming problem. In this paper, we propose a parallel sub circuit extraction algorithm on graphic processing unit. The experimental result shows that the proposed algorithm can achieve over 3x-7x times faster than serial algorithm. |
