Wafer edge polishing process for defect reduction during immersion lithography
Autor: | Yuri Uritsky, Chris Ngai, Chorng-Ping Chang, Motoya Okazaki, Yufei Chen, Mani Thothadri, Paul V. Miller, Manjari Dutta, Deenesh Padhi, Wendy H. Yeh, Raymond Maas, Chris Lazik, Sen-Hou Ko, Stephan Sinkwitz, Martin Jay Seamons, Abraham Anapolsky |
---|---|
Rok vydání: | 2008 |
Předmět: |
Materials science
business.industry Polishing ComputerApplications_COMPUTERSINOTHERSYSTEMS Nanotechnology Hardware_PERFORMANCEANDRELIABILITY Edge (geometry) Wafer backgrinding law.invention law Hardware_INTEGRATEDCIRCUITS Optoelectronics Wafer Photolithography business Front end of line Lithography Immersion lithography |
Zdroj: | SPIE Proceedings. |
ISSN: | 0277-786X |
Popis: | The objective of this study was to examine the defect reduction effect of the wafer edge polishing step on the immersion lithography process. The experimental wafers were processed through a typical front end of line device manufacturing process and half of the wafers were processed with the wafer edge polishing just prior to the immersion lithography process. The experimental wafers were then run through two immersion lithography experiments and the defect adders on these wafers were compared and analyzed. The experimental results indicated a strong effect of the edge polishing process on reducing the particle migration from the wafer edge region to the wafer surface during the immersion lithography process. |
Databáze: | OpenAIRE |
Externí odkaz: |