Analysis and compensation of the bitline multiplexer in SRAM current sense amplifiers
| Autor: | Bernhard Wicht, Doris Schmitt-Landsiedel, Steffen Paul |
|---|---|
| Rok vydání: | 2001 |
| Předmět: |
Engineering
business.industry Electrical engineering Hardware_PERFORMANCEANDRELIABILITY Integrated circuit layout Multiplexer Multiplexing law.invention CMOS law Low-power electronics Current sense amplifier Hardware_INTEGRATEDCIRCUITS Electronic engineering Operational amplifier Static random-access memory Electrical and Electronic Engineering business |
| Zdroj: | IEEE Journal of Solid-State Circuits. 36:1745-1755 |
| ISSN: | 0018-9200 |
| Popis: | Current sensing in SRAMs is very promising to achieve high-speed operation in low-voltage applications. However, so far, a main limitation of the practical use of current sense amplifiers is the finite resistance of the bitline multiplexer (MUX). In this paper, the MUX itself and its influence on two types of current sense amplifiers is analyzed. It is shown that the MUX causes a significant performance degradation. A principle is presented to compensate for the bitline multiplexer by means of a current sense amplifier with improved feedback structure. The proposed solution is implemented in a 512/spl times/24 bit SRAM macro in 0.18-/spl mu/m 1.8-V CMOS. It is shown by theory and measurements that, using the proposed circuit, it is possible to fully compensate for the MUX in terms of speed and signal amplitude with only little layout area penalty. A speed improvement due to the compensation of typically 0.5 ns is measured. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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