| Autor: |
Kai-Ming Yang, Tim Xia, Chia-Yu Peng, Cheng-Ta Ko, Po-Chun Huang, John H. Lau, Tzvy-Jang Tseng, Hsing Ning Liu, Puru Bruce Lin, Jean-Jou Chen |
| Rok vydání: |
2020 |
| Předmět: |
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| Zdroj: |
2020 IEEE 70th Electronic Components and Technology Conference (ECTC). |
| DOI: |
10.1109/ectc32862.2020.00062 |
| Popis: |
In this study, the fan-out chip-last panel-level packaging for heterogeneous integrations is investigated. Emphasis is placed on the design, materials, process, fabrication, and reliability of a heterogeneous integration of one large chip (10mm x 10mm) and two small chips (7mm x 5mm) by a fan-out method with a redistribution-layer (RDL)-first substrate fabricated on a 515mm x 510mm panel. Reliability assessments such as the thermal cycling of the heterogeneous integration of the 3-chip package printed circuit board (PCB) assembly are performed by a nonlinear temperature- and time-dependent finite element simulation. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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