Autor: |
F. de Crecy, Papa Momar Souare, J. Pruvost, Clement Tavernier, Perceval Coudrain, S. Dumas, Bastien Giraud, Alexis Farcy, H. Ben-Jamaa, Jean Michailos, N. Hotellier, L. Le Pailleur, András Borbély, C. Chancel, J.-M. Riviere, R. Franiatte, Sebastien Gallois-Garreignot, Vincent Fiori, C. Laviron, Jean-Philippe Colonna, Severine Cheramy |
Rok vydání: |
2014 |
Předmět: |
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Zdroj: |
2014 IEEE International Electron Devices Meeting. |
DOI: |
10.1109/iedm.2014.7047175 |
Popis: |
We present an advanced and comprehensive platform for thermal dissipation studies in TSV-based 3D ICs. A 2-tier 3D test chip with through silicon via (TSV) and μ-bump is used for thermal characterization with unprecedented precision and design exploration capabilities. A comprehensive calibrated 3D finite element model is associated to provide a predictive tool that is able to simulate the thermal mapping in any given 3D interconnect configuration with minimal error. Guidelines are finally provided for thermal optimization of 3D designs with a precision far beyond the prior art. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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