Configurable implementation of parallel memory based real-time video downscaler
| Autor: | Kimmo Kuusilinna, Eero Aho, Timo Hämäläinen, Jarno Vanne |
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| Rok vydání: | 2007 |
| Předmět: |
Video post-processing
Computer Networks and Communications Computer science business.industry Real-time computing ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION Bilinear interpolation Video processing Parallel processing (DSP implementation) Artificial Intelligence Hardware and Architecture Video tracking business Scaling Software Computer hardware |
| Zdroj: | Microprocessors and Microsystems. 31:283-292 |
| ISSN: | 0141-9331 |
| Popis: | Image downscaling is necessary in multiresolution video streaming and when a camera captures larger resolution frames than required. This paper presents an implementation of a downscaler capable of real-time scaling of color video. The scaler can be configured to support nearly arbitrary scaling ratios. The scaling method is based on evenly divisible image sizes, which is, in practice, the case in most video and image standards. Bilinear interpolation is utilized as the scaling algorithm. Fine-grained parallel processing is utilized to increase performance and parallel memories are used to attain the required bandwidth. The results show that an FPGA implementation can downscale 16VGA and HDTV video in real-time with a complexity of less than half of the reference implementations. |
| Databáze: | OpenAIRE |
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