| Autor: |
Mark Bourgeault, David Galloway, Gregg William Baeckler, Elias Ahmed, Andy L. Lee, David Lewis, Boris Ratchev, Sandy Marquardt, Christopher F. Lane, Richard G. Cliff, Srinivas T. Reddy, Bruce B. Pedersen, Michael D. Hutton, Jay Schleicher, Paul Leventis, Giles Powell, Cameron McClintock, Kevin Stevens, David Cashman, Jonathan Rose, Ketan Padalia, Vaughn Betz, Richard Yuan |
| Rok vydání: |
2005 |
| Předmět: |
|
| Zdroj: |
FPGA |
| Popis: |
This paper describes the Altera Stratix II™ logic and routing architecture. This architecture features a novel adaptive logic module (ALM) that is based on a 6-LUT, but can be partitioned into two smaller LUTs to efficiently implement circuits containing a range of LUT sizes that arises in conventional synthesis flows. This provides a performance increase of 15% in the Stratix II architecture while reducing area by 2%. The ALM also includes a more powerful arithmetic structure that can perform two bits of arithmetic per ALM, and perform a sum of up to three inputs. The routing fabric adds a new set of fast inputs to the routing multiplexers for another 3% improvement in performance, while other improvements in routing efficiency cause another 6% reduction in area. These changes in combination with other circuit and architecture changes in Stratix II contribute 27% of an overall 51% performance improvement (including architecture and process improvement). The architecture changes reduce area by 10% in the same process, and by 50% after including process migration. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
|
