An 8 ns 4 Mb serial access memory
| Autor: | Kenji Anami, K. Fujita, Hirotada Kuriyama, Y. Nishimura, Shuji Murakami, Tomohisa Wada, Toshihiko Hirose |
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| Rok vydání: | 1991 |
| Předmět: |
Random access memory
Flat memory model business.industry Computer science Sense amplifier Uniform memory access Semiconductor memory Parallel computing Extended memory Memory address Physical address Memory architecture Interleaved memory Static random-access memory Electrical and Electronic Engineering Memory refresh business Computer hardware Computer memory Access time |
| Zdroj: | IEEE Journal of Solid-State Circuits. 26:502-506 |
| ISSN: | 0018-9200 |
| DOI: | 10.1109/4.75046 |
| Popis: | A new architecture for serial access memory is described that enables a static random access memory (SRAM) to operate in a serial access mode. The design target is to access all memory address serially from any starting address with an access time of less than 10 ns. This can be done by all initializing procedure and three new circuit techniques. The initializing procedure is introduced to start the serial operation at an arbitrary memory address. Three circuit techniques eliminate extra delay time caused by an internal addressing of column lines, sense amplifiers, word lines, and memory cell blocks. This architecture was successfully implemented in a 4-Mb CMOS SRAM using a 0.6 mu m CMOS process technology. The measured serial access time was 8 ns at a single power supply voltage of 3.3 V. > |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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