Design of Low-Power 10-Transistor Full Adder Using GDI Technique for Energy-Efficient Arithmetic Applications

Autor:	T. Nirmalraj, S. K. Pandiyan, Rakesh Kumar Karan, R. Sivaraman, Rengarajan Amirtharajan
Rok vydání:	2023
Předmět:	Applied Mathematics Signal Processing
Zdroj:	Circuits, Systems, and Signal Processing. 42:3649-3667
ISSN:	1531-5878 0278-081X
DOI:	10.1007/s00034-022-02287-x
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::96061c8a73ebc8708fa299ad1034a95f https://doi.org/10.1007/s00034-022-02287-x Zobrazit plný text záznamu Full text from SpringerLink