Semianalytical model for high speed analysis of all-digital PLL clock-generating networks
| Autor: | Eugene Koskin, Orla Feely, Dimitri Galayko, Elena Blokhina |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
Computer science
Oscillation 020208 electrical & electronic engineering Detector Automatic frequency control Topology (electrical circuits) 02 engineering and technology Clock network Phase-locked loop CMOS 0202 electrical engineering electronic engineering information engineering Electronic engineering 020201 artificial intelligence & image processing Phase frequency detector |
| Zdroj: | ISCAS |
| DOI: | 10.1109/iscas.2017.8050582 |
| Popis: | In this paper, we propose the model of a network consisting of All-Digital Phase-Locked Loop Network in application to Clock-Generating Systems. The method is based on a solution of a system of non-linear finite-difference stochastic equations and allows us to perform high speed simulations of a distributed Clock Network on arbitrary topology. The result of our analysis show a good agreement with experimental measurements of a 65nm CMOS All-Digital Phase-Locked Loop Network. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|