Autor: |
D.M. Garner, G. Ensell, A. Popescu, Kuang Sheng, William I. Milne, Florin Udrea, H.T Lim |
Rok vydání: |
2001 |
Předmět: |
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Zdroj: |
Microelectronics Journal. 32:517-526 |
ISSN: |
0026-2692 |
DOI: |
10.1016/s0026-2692(01)00024-6 |
Popis: |
A power integrated circuit process has been developed, based on silicon-on-insulator, which allows intelligent CMOS control circuitry to be placed alongside integrated high-voltage power devices. A breakdown voltage of 335 V has been obtained by using a silicon layer of 4 μm thickness together with a buried oxide layer of 3 μm thickness. The respective LDMOS specific on-resistance and LIGBT on-state voltage for this breakdown voltage were 148 mΩ cm2 and 3.9 V, respectively. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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