Simulation of the failure mechanism of power DMOS transistors under avalanche stress

Autor: A. Icaza Deckelmann, Joachim Krumrey, Franz Hirler, Gerhard Wachutka
Rok vydání: 2004
Předmět:
Zdroj: Simulation of Semiconductor Processes and Devices 2004 ISBN: 9783709172124
Popis: The failure mechanism caused by avalanche stress in power devices consisting of large DMOS cell arrays is investigated using electrothermal device simulation. To this end, we use the approximation of an infinitely large array, but allow for thermal interaction among the cells. The numerical analysis demonstrate the occurrence of unstable states, where a single hot spot and a current filament evolve in one particular ‘weak’ cell, thus confirming earlier work. We also demonstrate that the maximum temperature rise in the first cell exhibiting filamentary current flow can easily exceed the destructive level. Subsequent current and temperature redistributions observed in simulation thus turn out to be of no practical relevance.
Databáze: OpenAIRE