Vertical-Gate Si/SiGe Double-HBT-Based Capacitorless 1T DRAM Cell for Extended Retention Time at Low Latch Voltage
| Autor: | Jaeman Jang, Ja Sun Shin, Hyunjun Choi, Daeyoun Yun, Dong Myong Kim, Euiyoun Hong, Dae Hwan Kim, Hagyoul Bae |
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| Rok vydání: | 2012 |
| Předmět: |
Fabrication
Materials science business.industry Heterojunction bipolar transistor Electrical engineering Hardware_PERFORMANCEANDRELIABILITY Electronic Optical and Magnetic Materials Silicon-germanium chemistry.chemical_compound Hysteresis chemistry Logic gate Hardware_INTEGRATEDCIRCUITS Optoelectronics Transient (oscillation) Electrical and Electronic Engineering business Dram Voltage |
| Zdroj: | IEEE Electron Device Letters. 33:134-136 |
| ISSN: | 1558-0563 0741-3106 |
| DOI: | 10.1109/led.2011.2174025 |
| Popis: | A vertical-gate Si/SiGe double heterojunction bipolar transistor (VerDHBT)-based capacitorless 1T DRAM cell is proposed for improved storage performance with a fabrication feasibility through a selective epitaxy. It is verified through a TCAD device simulation for dc and transient characteristics of the proposed VerDHBT-based 1T DRAM. The off-state leakage current was significantly reduced, while the on-current was considerably increased with SIF/Bmid/DIF = SiGe/SiGe/Si as the interfacial source/middle body/interfacial drain. A large hysteresis window for the “read 1” from the “read 0” and a long retention time at low latch voltage could be also obtained. |
| Databáze: | OpenAIRE |
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