| Autor: |
D. Dhanush, M. Aravinda Kumar, J. Gokul Prasath, C. S. Jagan Sai Kumar, Navya Mohan |
| Rok vydání: |
2020 |
| Předmět: |
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| Zdroj: |
Lecture Notes in Networks and Systems ISBN: 9789811573446 |
| DOI: |
10.1007/978-981-15-7345-3_33 |
| Popis: |
Low transition dual Linear Feedback Shift Register (LFSR) offers maximum fault coverage with comparatively less test data storage and less power dissipation than the traditional single LFSR. One of the serious problems faced during IC testing is higher power dissipation, which affects reliability and efficiency of manufacturing systems. The proposed research provides a possible solution for reducing power dissipation with reduced transitions and a new reseeding algorithm. Reduction in transitions is obtained by implementing the properties of AND and OR operations to the TPG (Test Pattern Generation). Vast experiments were conducted on all the benchmark circuits in ISCAS 85 circuits using simulation tools (ModelSim, Vivado, HOPE) to check the possibility and effectiveness of the proposed research idea. Results obtained from the proposed solution shows power reductions up to 20% than the traditional single LFSR during IC testing. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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