An eleven-switch inverter topology supplying two loads for common-mode voltage mitigation

Autor: Eedara Aswani Kumar, Garapati Satyanarayanat
Rok vydání: 2017
Předmět:
Zdroj: 2017 IEEE PES Asia-Pacific Power and Energy Engineering Conference (APPEEC).
DOI: 10.1109/appeec.2017.8308969
Popis: A nine-switch inverter has been used to power two independent loads operating at different frequencies. However fast switching of inverter results in high peak-to-peak common-mode voltages (CMVp ea k−p ea k) for both the loads. The common-mode voltage (CMV) reduces the life of bearings and winding insulation of loads. CMV analysis of nine-switch inverter shows that during zero states the CMV is at its peak value. This paper presents an eleven-switch topology to reduce this peak CMV value during zero states. Two extra switches are inserted in between the dc link and nine-switch topology. The first additional switch, which is called positive-switch, is inserted between positive DC bus and inverter top terminal. The second extra switch, which is called negative switch, is inserted between negative DC terminal and inverter input bottom node. Control logic is proposed to reduce the CMV of both the loads during zero states. During zero states either bottom load, top load or both the loads are isolated from the DC-link by turning OFF the positive switch, the negative switch or both the switches, respectively. The feasibility of the technique has been verified through simulation results. The CMV performance of proposed topology is better than the nine-switch topology without affecting other parameters like line voltage, phase voltage, load current.
Databáze: OpenAIRE