Modeling and verifying timed event-based systems
| Autor: | Seyed Morteza Babamir, Saeed Doostali |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
Model checking
Theoretical computer science Computation tree logic Scale (ratio) Computer science Event (computing) Distributed computing Event based Timed automaton Computer Science::Software Engineering 020207 software engineering 02 engineering and technology Automaton Unified Modeling Language 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing computer computer.programming_language |
| Zdroj: | 2017 Iranian Conference on Electrical Engineering (ICEE). |
| DOI: | 10.1109/iraniancee.2017.7985429 |
| Popis: | A part of large scale distributed and heterogeneous systems are event-based in which temporal properties play a critical role. In this paper, considering the temporal properties we first present a semi-formal based specification model using UML statecharts and then address the conversion of this model to formal one called timed automata. Next, we deal with verification of properties stated in Timed Computation Tree Logic (TCTL) formulas in the automata. By proposing a case study, we show the application of our method. |
| Databáze: | OpenAIRE |
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