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Cache memories have been traditionally precluded in real-time systems because of their unpredictable behavior. To make possible their use in preemptive schedulers, the cache-related preemption interference can be included in the schedulability analysis. Enabling the use of cache in this way, the schedulable utilization was notably improved, even if an entire cache flush is considered for each preemption. This paper explores how this cache flush can be used as the checkpointing action of saving the active data (cache) to the checkpoint data (main memory) to increase the dependability, in addition to the performance. The evaluation results show that the proposed technique has a negligible performance degradation, but it tolerates the recovery from one error without missing any deadline. |
