Layout dependence of gate dielectric TDDB in HKMG FinFET technology
Autor: | Charles W. Griffin, Dinesh Badami, David G. Brochu, Ernest Y. Wu, Michael A. Shinosky, W. Liu, Fernando Guarin, Roger A. Dufresne |
---|---|
Rok vydání: | 2016 |
Předmět: |
010302 applied physics
Leading edge Engineering business.industry 020208 electrical & electronic engineering Gate dielectric Electric breakdown Time-dependent gate oxide breakdown 02 engineering and technology Dielectric 01 natural sciences Logic gate 0103 physical sciences Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering Process optimization business Leakage (electronics) |
Zdroj: | 2016 IEEE International Reliability Physics Symposium (IRPS). |
DOI: | 10.1109/irps.2016.7574575 |
Popis: | In this work, we report for the first time the experimental evidence of layout dependence on gate dielectric time-dependent-dielectric-breakdown TDDB in a leading edge HKMG FinFET technology. Structures with identical total effective gate area but various Fin and finger configurations per unit cell show more than 10X difference in Tbd and Qbd before process optimization. Fin number per unit cell was found to be the major impact factor based on the correlation between Tbd and ToxGL extracted from initial leakage currents. The implication of these findings on technology qualification methodology is that one needs to evaluate layout sensitivity for processes under development to confirm that reliability assessment is valid for structures having various layout configurations. Processes with strong layout dependence should be optimized before technology qualification. |
Databáze: | OpenAIRE |
Externí odkaz: |