Spintronic normally-off heterogeneous system-on-chip design
| Autor: | Rajendra Bishnoi, Anteneh Gebregiorgis, Mehdi B. Tahoori |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
010302 applied physics
Spintronics Computer science business.industry System on chip design Normally off 02 engineering and technology 01 natural sciences 020202 computer hardware & architecture Non-volatile memory CMOS Component (UML) Embedded system 0103 physical sciences 0202 electrical engineering electronic engineering information engineering business Efficient energy use |
| Zdroj: | DATE |
| DOI: | 10.23919/date.2018.8341989 |
| Popis: | One of the major challenges in device down-scaling is the increase in the leakage power, which becomes a major component in the overall system power consumption. One way to deal with this problem is to introduce the concept of normally-off instant-on computing architectures, in which the system components are powered off when they are not active. An associated challenge is the back-up and restoration of system states, which in turn can introduce additional costs that erode some of the gains. A promising alternative is the use of non-volatile storage elements in the System-on-Chip (SoC) design which can instantly power-down and retain their values. In this work, we show how we can design a normally-off SoC by exploiting non-volatile latches, flip-flops and registers. The idea is to design a hybrid architecture containing conventional CMOS bistables as well as different flavors of spintronic-based non-volatile storage elements, to balance performance, area, and energy efficiency. |
| Databáze: | OpenAIRE |
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