A lower error antilogarithmic converter using novel four-region piecewise-linear approximation
Autor: | Tso-Bing Juang, Chao-Tsung Kuo |
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Rok vydání: | 2012 |
Předmět: | |
Zdroj: | APCCAS |
DOI: | 10.1109/apccas.2012.6419083 |
Popis: | In this paper, a novel antilogarithmic converter using four-region piecewise-linear approximation is proposed. The proposed technique provides a lower error and area-efficient hardware implementation for antilogarithmic converter with 0.5681% of percent error range, which can outperform previously proposed methods with four-region and six-region schemes. The delay and area of the hardware implementation is 10ns and 6,639 µm2, respectively using 0.18 µm TSMC process. |
Databáze: | OpenAIRE |
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