A Design of High-speed Power-off Circuit and Analysis
| Autor: | Nam-Ho Lee, Seong-Ik Cho, Sang-Hun Jeong |
|---|---|
| Rok vydání: | 2014 |
| Předmět: |
Photocurrent
Engineering Silicon business.industry Electrical engineering chemistry.chemical_element Thyristor Hardware_PERFORMANCEANDRELIABILITY Upset Power (physics) Darlington transistor Semiconductor chemistry Transient radiation Hardware_INTEGRATEDCIRCUITS Electrical and Electronic Engineering business Hardware_LOGICDESIGN |
| Zdroj: | The Transactions of The Korean Institute of Electrical Engineers. 63:490-494 |
| ISSN: | 1975-8359 |
| DOI: | 10.5370/kiee.2014.63.4.490 |
| Popis: | In this paper, a design of high-speed power-off circuit and analysis. The incidence of high-dose transient radiation into the silicon-based semiconductor element induces the photocurrent due to the creation of electron-hole pairs, which causes the upset phenomenon of active elements or triggers the parasitic thyristor in the element, resulting in latch-up. High speed power-off circuit was designed to prevent burn-out of electronic device caused by Latch-up. The proposed high speed power-off circuit was configured with the darlington transistor and photocoupler so that the power was interrupted and recovered without the need for an additional circuit, in order to improve the existing problem of SCR off when using the thyristor. The discharge speed of the high speed power interruption circuit was measured to be 19 ㎲ with 10 ㎌ and 500 Ω load, which was 98% shorter than before (12.8 ㎳). |
| Databáze: | OpenAIRE |
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