Design of NoC Router Architecture using VHDL

Autor:	Pankaj Agrawal, Minakshi M. Wanjari, R. V. Kshirsagar
Rok vydání:	2015
Předmět:	Router Computer science business.industry Hardware_PERFORMANCEANDRELIABILITY Telecommunications network Computer architecture Router architecture Component (UML) Embedded system VHDL Hardware_INTEGRATEDCIRCUITS Key (cryptography) Latency (engineering) business computer computer.programming_language
Zdroj:	International Journal of Computer Applications. 115:18-21
ISSN:	0975-8887
DOI:	10.5120/20139-2238
Popis:	Network-on-Chip (NoC) is an advance design method of communication network into System-on-Chip (SoC). It provides solution to the problems of traditional bus-based SoC. It is widely considered that NoC will take the place of traditional bus-based design and will meet the communication requirements of next SoC design. A router is the key component and called as the communication backbone in NoC. This paper presents NoC router architecture which has low latency and requires less area. The design is implemented in VHDL and simulated in Xilinx ISE Design Suite 13.1.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::8e775819924a279d7b80113ea5598c57 https://doi.org/10.5120/20139-2238 Zobrazit plný text záznamu