Design of 6-bit 800 Msample/s DSDA A/D Converter for HDD Read Channel

Autor: Gang-Min Jeong, Dae-Yeong Jeong
Rok vydání: 2002
Předmět:
Zdroj: The KIPS Transactions:PartA. :93-98
ISSN: 1598-2831
Popis: This paper introduces the design of high-speed analog-to-digital converter (ADC) for hard disk drive (HDD) read channel applications. This circuit is bated on fast regenerative autozero comparator for high speed and low-error rate comparison operation, and Double Speed Dual ADC (DSDA) architecture for efficiently increasing the overall conversion speed of ADC. A new type of thermometer-to-binary decoder appropriate for the autozero architecture is employed for no glitch decoding, simplifying the conventional structure significantly. This ADC is designed for 6-bit resolution, 800 Msample/s maximum conversion rate, 390 mW power dissipation, one clock cycle latency in 0.65 m CMOS technology.
Databáze: OpenAIRE