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With the advent of the internet of things (IoT), interest in integrating energy storage into silicon with energy harvesting and sensors has significantly increased. Silicon is already the materials of choice for the integrated circuits found in every IoT device; however, the efforts to integrate electrochemical (EC) capacitors on a silicon die have been limited. EC capacitors have cycle lifetimes of many thousands which is especially important for off-power-grid IoT devices where difficulty associated with regularly replacing the batteries of billions of devices is prohibitive. Porous silicon (P-Si) was previously viewed as unusable for energy storage because of its tendency to easily oxidize and difficulty in passivating [1, 2]. Bare porous-Si is not stable over a long period of time due to unwanted reactions with the electrolyte. In our work, we have developed integrated energy storage based on P-Si nanostructures with highly branched pores coated with a variety of atomic layer deposited (ALD) films including films that have the potential of pseudocapacitive properties. ALD of films in ultrahigh aspect-ratio features (AR > 100:1) presents unique challenges. To obtain uniform coatings, efficient surface reactions are needed between high volatility, low molecular weight, small molecular diameter precursors without chemical vapor deposition side reactions. ALD titanium nitride (TiN) using TiCl4 + NH3 met these criteria and resulted in passivating conductive films [3, 4]. To further increase the energy density, materials that may have pseudo capacitive properties including VN, Nb2O5, VTiN, and TiAlN were coated using stop-flow ALD processing. Whereas the majority of ALD is in a continuous viscous flow reactor, a pseudo stop-flow reactor was used to obtain uniform coatings. The substrate was allowed higher-pressure extended precursor soak times with intervening pump-purge cycles to remove excess precursor and reaction byproducts. The large open central regions needed in the pore structure for ion transport also aids in the coating process by enhancing precursor diffusion down the pores. Cross-sectional SEM images in backscatter mode and TEM images were used to examined the penetration depth and show that TiN can penetrate deep into the pores (see Fig. 2), but TiAlN tends to seal the pores and the penetration depth of Nb2O5 is limited. VN however was successfully coated into porous silicon to depths of 10 µm with a double dose process at 325 °C. Measurements from coated P-Si capacitors reveal that high areal capacitance of 3 to 6 mF/cm2 can be achieved using 2 um deep pores and 28 mF/cm2with 12 um deep pores, about two orders of magnitude higher than previously P-Si studies [1, 2]. In addition, to increase the total stored energy and operating voltage, samples were prepared with silicon that had pores etched into both sides of the substrate (see Fig. 1) using a double cell HF tank system with electrolytical backside contact. The substrates were then stacked resulting in electrochemical capacitors in series thereby doubling the maximum voltage to 5 V and also doubling the total energy stored. These devices have the potential to provide integrated on-chip energy storage. [1] S. E. Rowlands, R. J. Latham, and W. S. Schlindwein, Ionics 5, 144–149 (1999). [2] S. Desplobain, G. Gautier, J. Semai, L. Ventura and M. Roy, Phys. Stat. Sol. (c), 4, 2180, 2007. [3] D. S. Gardner, C. W. Holzwarth, Y. Liu, S. B. Clendenning, W. Jin, B. K. Moon, et al., "Integrated On-Chip Energy Storage Using Porous-Silicon Electrochemical Capacitors," presented at the Int'l. Electron Devices Meeting (IEDM), 2014. [4] D. S. Gardner, C. W. Holzwarth III, Y. Liu, S. B. Clendenning, W. Jin, B. K. Moon, C. Pint, Z. Chen, E. Hannah, C. Chen, C. P. Wang, E. Mäkilä, R. Chen, T. Aldridge, and J. L. Gustafson, “Integrated On-Chip Energy Storage Using Passivated Nanoporous-Silicon Electrochemical Capacitors”, Nano Energy (2016), doi: 10.1016/j.nanoen.2016.04.016 Figure 1 |
