Popis: |
Quite some time has passed since it was pointed out that the wafer surface and Si—SiO2 interface micro-roughness exert a harmful influence on MOS device characteristics [1]. Though there is no clear definition of “micro-roughness” itself, here we will use the term to denote irregularities of the atomic layer existing on the surface or Si—SiO2 interface. In the relatively large device manufacturing of the past, micro-roughness caused no problems in terms of device characteristics. However, with the miniaturization brought on by the higher integration of the device and the thinning of the MOSFET gate oxide film, and micro-roughness can no longer be ignored. |