Autor: |
Cheng-Yu Wang, Chih-Hsien Shen, Chia-Hsin Wu, Yi-Hsien Cho, Yang-Chuan Chen, Yuan-Hung Chung, Yu-Hsin Lin, Jie-Wei Lai, Wei-Kai Hong, Anson Lin |
Rok vydání: |
2009 |
Předmět: |
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Zdroj: |
IEEE Journal of Solid-State Circuits. 44:2911-2921 |
ISSN: |
0018-9200 |
DOI: |
10.1109/jssc.2009.2028920 |
Popis: |
A fully integrated system-on-a-chip (SOC) in 130-nm CMOS technology compliant with world-band 802.11a/b/g is presented. This SOC integrates all blocks including 2.4-GHz/5-GHz RF tranceiver, baseband physical layer (PHY), and the medium access controller (MAC). At 1.8 V, the whole SOC dissipates 144/168 mA in receiving mode and 114/150 mA in transmitting mode for 2.4-GHz/5-GHz-band operations. The measured receiver sensitivity at 2.4 GHz/5 GHz is -77.5/-74 dBm at 54 Mb/s rate, and the transmitter EVM at 54 Mb/s rate is -33/-30 dB at an output power of -7/-8 dBm. By integrating multiple on-chip LDOs with no off-chip capacitors, this SOC features the capability of being directly supplied by off-chip switching-type DC/DC converter without performance degradation. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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