A Comprehensive Study of a Single-Transistor Latch in Vertical Pillar-Type FETs With Asymmetric Source and Drain
| Autor: | Yang-Kyu Choi, Ik Kyeong Jin, Seung-Wook Lee, Do Hyun Kim, Seong-Yeon Kim, Jae Hur, Kyu-Man Hwang, Wu-Kang Kim, Jun Woo Son |
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| Rok vydání: | 2018 |
| Předmět: |
010302 applied physics
Physics Random access memory Doping Transistor Pillar 02 engineering and technology Type (model theory) 021001 nanoscience & nanotechnology 01 natural sciences Electronic Optical and Magnetic Materials law.invention Computer Science::Hardware Architecture law 0103 physical sciences Field-effect transistor Electrical and Electronic Engineering Atomic physics 0210 nano-technology |
| Zdroj: | IEEE Transactions on Electron Devices. 65:5208-5212 |
| ISSN: | 1557-9646 0018-9383 |
| DOI: | 10.1109/ted.2018.2869670 |
| Popis: | The single-transistor latch in vertical pillar-type FETs with asymmetric source and drain (S/D) was investigated for capacitorless one transistor dynamic random access memory (1T-DRAM). The asymmetric S/D is produced by the different energies of ion implantation at different depths of the pillar. The window of latch voltage ( $\Delta {V}_{L}$ ), which is the difference between the latch-up voltage ( ${V}_{\textit {LU}}$ ) and latch-down voltage ( ${V}_{\textit {LD}}$ ), was dominantly governed by ${V}_{\textit {LD}}$ . Fluctuation in the $\Delta {V}_{L}{(}{=}{V}_{\textit {LU}} - {V}_{\textit {LD}}$ ) is mainly induced by different series resistances ( ${R}_{\textit {SD}}$ ). The variation in ${R}_{\textit {SD}}$ becomes increasingly fatal to the stable operation of a 1T-DRAM with a smaller diameter; therefore, uniform control of ${R}_{\textit {SD}}$ is very important for the read operation in 1T-DRAM. In addition, the doping concentration of the source should be high for wide $\Delta {V}_{L}$ . |
| Databáze: | OpenAIRE |
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