Design and performance of SOI pass transistors for 1 Gbit DRAMs
Autor: | Theodore W. Houston, T.J. Aton, Yin Hu, Keith A. Joyner, C.W. Teng |
---|---|
Rok vydání: | 2002 |
Předmět: |
Hardware_MEMORYSTRUCTURES
Materials science Pass transistor logic business.industry Transistor Electrical engineering Silicon on insulator Hardware_PERFORMANCEANDRELIABILITY law.invention Hardware_GENERAL Thin-film transistor law Gate oxide Hardware_INTEGRATEDCIRCUITS Optoelectronics business NMOS logic Dram Hardware_LOGICDESIGN Leakage (electronics) |
Zdroj: | 1996 Symposium on VLSI Technology. Digest of Technical Papers. |
Popis: | Both partially and fully depleted NMOS pass transistors were designed and fabricated on SIMOX substrates. Using a p+ gate design, V/sub th/=1 V and I/sub off/ |
Databáze: | OpenAIRE |
Externí odkaz: |