A Hardware Scheduler for Real Time Multiprocessor System on Chip

Autor:	Rabi N. Mahapatra, Gupta Nikhil, Ayan Mandal, Suman K. Mandal, Javier Malave
Rok vydání:	2010
Předmět:	Fixed-priority pre-emptive scheduling Software business.industry Computer science Scheduler activations Deadline scheduler System on a chip Multiprocessing Parallel computing Energy consumption business Computer hardware Scheduling (computing)
Zdroj:	VLSI Design
DOI:	10.1109/vlsi.design.2010.43
Popis:	This paper presents the design and implementation of a low-power hardware scheduler for multiprocessor system-on-chips. The Pfair scheduling algorithm is considered with three different implementation schemes: replicated software scheduler running on each processor, single software scheduler running on a dedicated processor and the proposed hardware scheduler. Experimental evaluation with benchmarks shows that the hardware scheduler outperforms the other two schemes in terms of energy consumption by an order of magnitude of 10^5 and scheduling delay by an order of magnitude of 10^3.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::877b3ffaacd4c5101b444d5d5395ab58 https://doi.org/10.1109/vlsi.design.2010.43 Zobrazit plný text záznamu