A 200 MS/s passive switched-capacitor FIR equalizer using a time-interleaved topology

Autor:	Paul J. Hurst, Pak-Kim Lau, N.J. Guilar, Stephen H. Lewis
Rok vydání:	2006
Předmět:	Physics Nonlinear system CMOS Finite impulse response Parasitic capacitance Hardware_INTEGRATEDCIRCUITS Electronic engineering Topology (electrical circuits) Topology Switched capacitor Network topology Transfer function
Zdroj:	CICC
Popis:	A low-power passive switched-capacitor finite-impulse response equalizer with six time-interleaved channels has been fabricated in 0.35/spl mu/m CMOS. Nonlinear parasitic capacitance scales the equalized output but does not affect the zero locations of the equalizer for a binary or ternary data signal. The equalizer is fully differential with a 4-tap transfer function. The equalizer consumes 19.5 mW at 200 MS/s and occupies an active area of 1.3mm/sup 2/.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::8731ec8d3fd21f7062c6c9c973563d2b https://doi.org/10.1109/cicc.2005.1568749 Zobrazit plný text záznamu