| Autor: |
B.L. Yeoh, Nl Chung, T. Fei, T. Y. Lim, C. P. Yap, G.F. You, S.H. Goh, Jeffrey Lam, Hao Hu |
| Rok vydání: |
2013 |
| Předmět: |
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| Zdroj: |
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA). |
| Popis: |
Scan diagnosis based fault isolation technique using Electronic Design Automation (EDA) software tool is highly effective and commonly adopted for product chain and logic yield learning. For every new device introduction, prior to implementation of scan diagnosis for yield ramp, it is necessary to validate the success and accuracy of the test patterns generated for diagnosis. The accuracy of the fail suspects isolated is typically verified on physical failure analysis (PFA). In this paper, a non destructive verification methodology without the need for design information, die packaging and physical failure analysis is proposed. The contribution is a faster turnaround time for success qualification. The experimental data in this work demonstrates the feasibility and presents an added application for wafer level laser diagnostics. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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