A low-jitter PLL for digital TV instrumentation
| Autor: | Hitoshi Kondoh, Fuminori Kobayashi, Yutaka Nakanishi |
|---|---|
| Rok vydání: | 2009 |
| Předmět: |
Computer science
business.industry Phase-locked loop Reduction (complexity) Low jitter Hardware_INTEGRATEDCIRCUITS Electronic engineering ComputerSystemsOrganization_SPECIAL-PURPOSEANDAPPLICATION-BASEDSYSTEMS Instrumentation (computer programming) Sensitivity (control systems) Digital television Field-programmable gate array business Jitter |
| Zdroj: | 2009 IEEE International Symposium on Industrial Electronics. |
| Popis: | For consumer products of the digital age, ‘stable’ clock signals are crucial, leading to similar requirement for industrial instrumentation. In order to reduce jitters, rapid fluctuation in frequency, for such applications, this article proposes a novel configuration. Feed-forward compensator improves jitter filtration, without sacrifice in the reduction of inherent jitters. Adaptive gain, which is set high for locking and low for jitter filtration after locking, yields fast responses while keeping jitters low, as well. Its effectiveness is verified on a prototype implemented by an FPGA, and experiments as a multiply-by-50 synthesizer result in 30-fold reduction for inherent jitters and no amplification of incoming jitters. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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