Improving model predictive control arithmetic robustness by Monte Carlo simulations
| Autor: | Mayuresh V. Kothare, Mark G. Arnold, Panagiotis D. Vouzis, Sylvain Collange |
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| Rok vydání: | 2012 |
| Předmět: |
Control and Optimization
Computer science Numerical analysis Monte Carlo method Logarithmic number system Computer Science Applications Human-Computer Interaction Model predictive control Control and Systems Engineering Control theory Robustness (computer science) Direct consequence Hardware_ARITHMETICANDLOGICSTRUCTURES Electrical and Electronic Engineering Arithmetic Field-programmable gate array |
| Zdroj: | IET Control Theory & Applications. 6:1064-1070 |
| ISSN: | 1751-8652 1751-8644 |
| DOI: | 10.1049/iet-cta.2010.0736 |
| Popis: | Model predictive control (MPC) is an optimisation-based algorithm which usually requires a numerical method to calculate the solution of the problem. Inherently, numerical methods for optimisation problems are implemented on a finite-precision hardware platform and are subject to the appearance of numerical instabilities of catastrophic cancellation and ill-conditioned matrices. These anomalies are difficult to detect and overcome, and for safety-critical applications, it is essential to have a mechanism that can at least issue a warning when an arithmetic instability occurs. Towards this direction, Monte Carlo arithmetic (MCA) for the floating-point (FP) number system has been used for both detection and mitigation of catastrophic cancellation and ill-conditioned matrices. An alternative to FP is the Logarithmic Number System (LNS) that recently has been proposed for the real-time hardware implementation of embedded MPC. In this study the authors present the adaptation of MCA to LNS for detecting and mitigating catastrophic cancellation, forming the Monte Carlo Logarithmic Number System (MCLNS). An inherent drawback of MCA is the accuracy deterioration which is a direct consequence of the randomisation in the arithmetic operations. Additionally, multiple simulations of the system result in performance deterioration equal to the number of simulations. Using off-line simulations it is possible to determine the necessary hardware requirements to achieve desired accuracy under performance constraints. These trade-offs are studied and analysed for an MPC algorithm, and the hardware implementation cost of MCLNS is quantified by synthesis on a Xilinx Virtex-IV FPGA. |
| Databáze: | OpenAIRE |
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