A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist
| Autor: | Wei-Sheng Peng, Kuen-Di Lee, Po-Tsang Huang, Shang-Lin Wu, Sheng-Chi Lung, Ming-Hsien Tu, Ching-Te Chuang, Huan-Shun Huang, Kuang-Yu Li, Yung-Shin Kao, Wei Hwang |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
Engineering
Power gating business.industry 020208 electrical & electronic engineering Electrical engineering 02 engineering and technology Chip 020202 computer hardware & architecture CMOS Dynamic demand 0202 electrical engineering electronic engineering information engineering Electronic engineering Inverter Static random-access memory Electrical and Electronic Engineering business Low voltage Voltage |
| Zdroj: | IEEE Transactions on Circuits and Systems I: Regular Papers. 64:1791-1802 |
| ISSN: | 1558-0806 1549-8328 |
| DOI: | 10.1109/tcsi.2017.2681738 |
| Popis: | This paper presents a 28-nm 256-kb 6T static random access memory operating down to near-threshold regime. The cell array is built on foundry 4-by-2 mini-array with split single-ended large signal sensing to enable an ultra-short local bit-line of 4-b length to improve variation tolerance and performance, and to reduce disturb while maintaining manufacturability. The design employs threshold power gating to facilitate lower NAP (Sleep) mode voltage/power and faster wake-up for the cell array, and low-swing global read bit-line (GRBL) with integrated low-swing voltage precharger to improve read performance and reduce the dynamic read power. A cell Vtrip-tracking write-assist (VTWA) lowers the selected sub-array supply to cell inverter trip voltage to enhance write-ability while providing PVT tracking capability to ensure adequate data retention margin for unselected cells in the selected sub-array. The 256-kb test chip is implemented in UMC 28-nm high- $\kappa $ metal-gate (H $\kappa $ MG) CMOS technology with macro area of $1058.22\times 374.76~\mu \text{m}^{2}$ . Error-free full functionality is achieved from 0.9 down to 0.5 V (limited by read VMIN without redundancy. The low-swing GRBL reduces dynamic power by 6.5% (8.0%) at 0.9 V (0.6 V). The VTWA improves the write VMIN by 75 mV (from 0.525 to 0.45 V). The measured maximum operation frequency is 735 MHz (20 MHz) at 0.9 V (0.5 V), TT corner, 25°. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|