Synthesis of DDRO Timing Monitors by Delay-Tracking and Static Timing Analysis
| Autor: | Jens Bargfrede, Helmut Graeb, Nasim Pour Aryan, Christian Funke, Lantao Wang, Jahnavi Kasturi Rangan |
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| Rok vydání: | 2020 |
| Předmět: |
Optimization problem
Matching (graph theory) Computer science 020208 electrical & electronic engineering Process (computing) Static timing analysis 02 engineering and technology Industrial design Control theory 0202 electrical engineering electronic engineering information engineering Node (circuits) Sensitivity (control systems) Electrical and Electronic Engineering Voltage |
| Zdroj: | IEEE Transactions on Circuits and Systems I: Regular Papers. 67:401-414 |
| ISSN: | 1558-0806 1549-8328 |
| Popis: | State-of-the-art design dependent ring oscillators (DDROs) aim to evaluate the timing variability of critical paths due to process, temperature, and voltage (PVT) fluctuations by matching their delay sensitivities. In this paper, a novel concept to synthesize DDROs is introduced, where the objective of the synthesis is to match the delays instead of delay sensitivities of critical paths. Such delay-tracking based DDROs can be built using static timing analysis (STA) to characterize delays, which makes this approach applicable to large-scale industrial designs. Moreover, a novel heuristic algorithm is developed which reduces the complexity of the optimization problem in contrast to direct solvers. Furthermore, new methods to characterize delays of tiles, the building blocks of DDROs, are described. Simulation results are presented for an industrial design in a sub-40 nm technology node. |
| Databáze: | OpenAIRE |
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