RF/High-Speed I/O ESD Protection: Co-optimizing Strategy Between BEOL Capacitance and HBM Immunity in Advanced CMOS Process
| Autor: | Guido Groeseneken, Dimitri Linten, Shih-Hung Chen, Wei-Min Wu, Ming-Dou Ker, Jie-Ting Chen |
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| Rok vydání: | 2020 |
| Předmět: |
010302 applied physics
Electrostatic discharge business.industry Computer science Electrical engineering Hardware_PERFORMANCEANDRELIABILITY 01 natural sciences Capacitance Electronic Optical and Magnetic Materials Parasitic capacitance 0103 physical sciences Broadband Hardware_INTEGRATEDCIRCUITS Cellular network Bandwidth (computing) Radio frequency Electrical and Electronic Engineering Latency (engineering) business Hardware_LOGICDESIGN |
| Zdroj: | IEEE Transactions on Electron Devices. 67:2752-2759 |
| ISSN: | 1557-9646 0018-9383 |
| Popis: | In order to meet the requirement of ultrahigh-speed, low latency, and wide bandwidth (BW) in the next 5G mobile network and internet of things (IoT) applications, the parasitic capacitance specification of electrostatic discharge (ESD) protection devices should become much stricter. Reducing the capacitance always degrades the ESD performance in terms of shrinking the size of the ESD protection device. The distributed ESD protection network is one of the solutions which mitigates the capacitance issue and provides a broadband design. However, while the ESD devices are put under the I/O pad in the distributed ESD protection network, back-end-of-line (BEOL) capacitance starts to play an important role in the advanced 28-nm CMOS process. Therefore, a tapered metal structure is proposed to significantly reduce 30% BEOL capacitance of the ESD device, which can gain a 2.8-GHz increase in the operational BW in the distributed network. Meanwhile, it can enhance the human-body-model (HBM) level up to 16% higher than the original layout style under the same front-end-of-line (FEOL) layout size. |
| Databáze: | OpenAIRE |
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