A 30- mu A data-retention pseudostatic RAM with virtually static RAM mode

Autor:	T. Asami, Tetsuya Iizuka, M. Kakuma, Kazuhito Narita, Kazutaka Nogami, J. Matsunaga, M. Kinugawa, Tsukasa Shirotori, Kazuyuki Sato, Kazuhiro Sawada, Akira Higuchi, Takayasu Sakurai, M. Isobe, Morita Shigeru
Rok vydání:	1988
Předmět:	Very-large-scale integration Magnetoresistive random-access memory CMOS business.industry Computer science Arbiter Static random-access memory Timer Electrical and Electronic Engineering business Computer hardware Access time Electronic circuit
Zdroj:	IEEE Journal of Solid-State Circuits. 23:12-19
ISSN:	1558-173X 0018-9200
DOI:	10.1109/4.250
Popis:	A 1-Mb (128K*8) pseudostatic RAM (PSRAM) is described. A novel feature of the RAM is the inclusion of a virtually static RAM (VSRAM) mode, while being fully compatible with a standard PSRAM. The RAM changes into the VSRAM mode when the RFSH pin is grounded, even in active cycles. The RAM can be used either as a fast PSRAM of 36-ns access time or as a convenient VSRAM of 66-ns access time. The typical operation current and data-retention current are 30 mA at 160-ns cycle time and 30 mu A, respectively. In order to achieve high-speed operation, low data-retention current, and high reliability, the RAM uses delay-time tunable design, a current-mirror timer, hot-carrier resistant circuits, and an optimized arbiter. These technologies are applicable to general advanced VLSIs. >
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::82c0e946bf51a223ad44fc60561796af https://doi.org/10.1109/4.250 Zobrazit plný text záznamu