Rapid thermal oxidation of silicon with different thermal annealing cycles in nitrogen: Influence on surface microroughness and electrical characteristics
| Autor: | Claus Martin Hasenack, S G dos Santos Filho, V Baranauskas, M. C. V. Lopes |
|---|---|
| Rok vydání: | 1995 |
| Předmět: |
Thermal oxidation
Materials science Silicon Annealing (metallurgy) Analytical chemistry chemistry.chemical_element Surface finish Condensed Matter Physics Electronic Optical and Magnetic Materials law.invention Root mean square Capacitor chemistry law Ellipsometry Materials Chemistry Wafer Electrical and Electronic Engineering |
| Zdroj: | Semiconductor Science and Technology. 10:990-996 |
| ISSN: | 1361-6641 0268-1242 |
| DOI: | 10.1088/0268-1242/10/7/015 |
| Popis: | The influence of two different thermal annealing cycles on the microroughness of the Si-SiO2 interface and on the electrical characteristics of the Si-SiO2 system has been investigated. Experiments were performed growing oxides by rapid thermal oxidation (RTO) and post-oxidation annealing in N2 using a slow cooling ramp recipe (SCRR) or a conventional pulsed thermal annealing recipe (PTAR). Compared to PTAR, SCRR yielded a more severe annealing in N2 and slower temperature decay after RTO. The thickness of the as-grown oxides was measured by ellipsometry in the whole wafer area. Laser light scattering (LLS) at a grazing angle and atomic force microscopy (AFM) have been used for measuring the Si-SiO2 interface topography after the SiO2 removal. LLS was mainly used for large-area scans (micrometric resolution) and AFM for small-size areas (atomic resolution). The results showed that oxides prepared with SCRR exhibited a smoother Si-SiO2 interface at the nanometric scale and protrusions up to 2.5 nm high and up to 100 nm wide ('large protrusions') at a submicrometre scale. On the other hand, the oxides prepared with PTAR resulted in an Si-SiO2, interface with protrusions up to 2 nm high and up to 5 nm wide ('sharp protrusions') at the nanometric scale and broad localized regions, sparsely distributed over the wafer area, with high root mean square (RMS) microroughness. By measuring the electrical parameters of a large number of MOS capacitors made with these oxides, we demonstrated evident experimental correlation of the electric breakdown field (Ebd), charge to breakdown (Qbd), Si-SiO2 interface state density (Dit) and Al-SiO2 potential barrier height ( phi 0) with surface microroughness and therefore with the thermal annealing cycle in N2. The oxides prepared by SCRR exhibited improved overall electrical parameters as compared to the oxides prepared by PTAR. |
| Databáze: | OpenAIRE |
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