Design and Analysis of a $Ka$-Band Monolithic High-Efficiency Frequency Quadrupler Using GaAs HBT–HEMT Common-Base/Common-Source Balanced Topology
| Autor: | Chih-Chun Shen, Guan-Yu Chen, Yen-Liang Yeh, Shou-Hsien Weng, Hong-Yeh Chang, Yu-Chi Wang, Yue-Ming Hsin, Jia-Shiang Fu |
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| Rok vydání: | 2013 |
| Předmět: |
Engineering
Radiation business.industry Frequency multiplier Heterojunction bipolar transistor Transistor dBm High-electron-mobility transistor Condensed Matter Physics Topology law.invention Gallium arsenide chemistry.chemical_compound chemistry law Electronic engineering Ka band Electrical and Electronic Engineering business DC bias |
| Zdroj: | IEEE Transactions on Microwave Theory and Techniques. 61:3674-3689 |
| ISSN: | 1557-9670 0018-9480 |
| DOI: | 10.1109/tmtt.2013.2277991 |
| Popis: | A Ka-band monolithic high-efficiency frequency quadrupler using a GaAs heterojunction bipolar transistor and pseudomorphic high electron-mobility transistor technology is presented in this paper. The frequency quadrupler is constructed cascading two frequency doublers. The frequency doubler employs a modified common-base/common-source topology to enhance the second harmonic efficiently. The dc bias condition, harmonic output power, conversion gain, and efficiency for variable configurations are investigated. Two phase-shifter networks are used to reduce phase error and improve the fundamental rejection. Between 23-30 GHz, the proposed frequency quadrupler features a conversion gain of higher than -1 dB with an input power of 4 dBm. The maximum conversion gain is 2.7 dB at 28 GHz with an efficiency of up to 8% and a power-added efficiency of 3.6%. The maximum output 1-dB compression point (P1 dB) and the saturation output power (Psat) are higher than 7 and 8.2 dBm, respectively. The overall chip size is 2×1 mm2. |
| Databáze: | OpenAIRE |
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