| Autor: |
J.P. Schoellkopf, Thomas Skotnicki, Richard Fournel, Pascale Mazoyer, R. Bouchakour, Pierre Malinge, Francois Jacquet, G. Gasiot, Pascal Masson, Alexandre Villaret, R. Ranica, P. Roche, Philippe Candelier |
| Rok vydání: |
2005 |
| Předmět: |
|
| Zdroj: |
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005.. |
| DOI: |
10.1109/.2005.1469203 |
| Popis: |
A one transistor DRAM cell realized on bulk substrate (lT-Bulk) with CMOS 90nm platform is presented for the first time. The device fabrication is fully compatible with logic process integration and includes only few additional steps, thus making this IT cell very attractive for low-cost embedded memories. Very scaled devices were fabricated with a gate length down to 80nm and several gate oxide thicknesses: their performances in terms of memory effect amplitude, retention time and disturb margins are very promising for future high density eDRAM. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
|
