Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities
| Autor: | Harish K. Krishnamurthy, Steven K. Hsu, Chris H. Kim, Vivek De, Ram Krishnamurthy, Sriram R. Vangal, Somnath Paul, Amit Agarwal, Saurabh Kumar, James W. Tschanz |
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| Rok vydání: | 2021 |
| Předmět: |
Computer science
business.industry Circuit design Cloud computing 02 engineering and technology Voltage regulator 020202 computer hardware & architecture Soft error CMOS Computer architecture Hardware and Architecture Logic gate Scalability 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering business Software Efficient energy use |
| Zdroj: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29:843-856 |
| ISSN: | 1557-9999 1063-8210 |
| DOI: | 10.1109/tvlsi.2021.3061649 |
| Popis: | The system-on-chip (SoC) designs for future Internet of Things (IoT) systems, spanning client platforms to cloud datacenters, need to deliver uncompromising and scalable performance with extreme energy efficiency for diverse workloads and applications, while satisfying a wide range of energy budgets, as well as platform cooling and power delivery constraints. Low-latency, burst-mode responsiveness, and scalable high-throughput performance must be delivered on demand for a range of thread-parallel, task-parallel, and data-parallel workloads covering traditional and emerging applications. This article discusses the challenges and opportunities for many-core SoC design in scaled CMOS process operating over a wide voltage-frequency range including near-threshold-voltage (NTV) that can meet the compute demands of the future at scale, flexibly, and efficiently. This article covers: 1) circuit design techniques for NTV cores; 2) mitigation techniques for within-die parameter variations via multivoltage frequency schemes; 3) digital integrated voltage regulators (VRs) for fine-grain and wide-range voltage modulation; and 4) radiation-induced soft error rate (SER) characterization and mitigation techniques to enable reliable operation at NTV. Silicon prototype examples will be used to illustrate the different techniques and highlight future research directions. |
| Databáze: | OpenAIRE |
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