Hardware Implementation of Successive-Cancellation Decoders for Polar Codes
| Autor: | Alexandre J. Raymond, Sarkis Gabi, Camille Leroux, Ido Tal, Alexander Vardy, Warren J. Gross |
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| Rok vydání: | 2012 |
| Předmět: |
Theoretical computer science
Logarithm Computer science Data_CODINGANDINFORMATIONTHEORY Parallel computing Coding theory Division (mathematics) Theoretical Computer Science Hardware and Architecture Control and Systems Engineering Modeling and Simulation Signal Processing Code (cryptography) Multiplication Decoding methods Computer Science::Information Theory Information Systems Communication channel |
| Zdroj: | Journal of Signal Processing Systems. 69:305-315 |
| ISSN: | 1939-8115 1939-8018 |
| DOI: | 10.1007/s11265-012-0685-3 |
| Popis: | The recently-discovered polar codes are seen as a major breakthrough in coding theory; they provably achieve the theoretical capacity of discrete memoryless channels using the low-complexity successive cancellation decoding algorithm. Motivated by recent developments in polar coding theory, we propose a family of efficient hardware implementations for successive cancellation (SC) polar decoders. We show that such decoders can be implemented with O(N) processing elements and O(N) memory elements. Furthermore, we show that SC decoding can be implemented in the logarithmic domain, thereby eliminating costly multiplication and division operations, and reducing the complexity of each processing element greatly. We also present a detailed architecture for an SC decoder and provide logic synthesis results confirming the linear complexity growth of the decoder as the code length increases. |
| Databáze: | OpenAIRE |
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