| Autor: |
Zhe-Yang Huang, Wan-Ru Lin, Yi-Zhi Zeng, Chun-Chieh Chen, Nan-Ku Lu, Chin-Hung Hsu |
| Rok vydání: |
2006 |
| Předmět: |
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| Zdroj: |
2006 International Symposium on Intelligent Signal Processing and Communications. |
| DOI: |
10.1109/ispacs.2006.364849 |
| Popis: |
A 10-bit folded multi-LSB decided resistor string DAC is presented. The proposed circuits that using the LSBs of the input digital words to decide the output voltage can significantly reduce the number of unit resistors up to 75% compared with the traditional resistor string DAC. The measured results show that the INL is less than 0.73 LSB and the maximum DNL is 0.26 LSB. The active chip area is less than 0.25 mm2. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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