Low-Power High-Accuracy Approximate Multiplier Using Approximate High-Order Compressors
| Autor: | Che-Wei Tung, Shih-Hsu Huang |
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| Rok vydání: | 2019 |
| Předmět: |
Adder
Computer science 02 engineering and technology 020202 computer hardware & architecture 030507 speech-language pathology & audiology 03 medical and health sciences Power demand Power consumption Logic gate 0202 electrical engineering electronic engineering information engineering Multiplier (economics) Hardware_ARITHMETICANDLOGICSTRUCTURES High order 0305 other medical science Algorithm Gas compressor |
| Zdroj: | 2019 2nd International Conference on Communication Engineering and Technology (ICCET). |
| DOI: | 10.1109/iccet.2019.8726875 |
| Popis: | To reduce the power consumption, the design of approximate multiplier appears as a promising solution for many error-resilient applications. In this paper, we propose a low-power high-accuracy approximate 8 × 8 multiplier design. The proposed design has two main features. First, according to the significance, different weights utilize different compressors (in different levels of accuracy) to accumulate their product terms. As a result, the power consumption can be saved with a small error. Second, for the middle significance weights, we use high-order approximate compressors (e.g., 8:2 compressor) to reduce the logic of carry chains. To our knowledge, the proposed design is the first work that successfully uses high-order approximate compressors in the approximate multiplier design. Compared with an exact multiplier (Dadda tree multiplier), experimental results show that the proposed approximate multiplier can achieve both low power and high accuracy. |
| Databáze: | OpenAIRE |
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