Analysis of library functions for FPGA compute accelerators
| Autor: | Spenser Gilliland, Fernando Martinez Vallina, Jafar Saniie |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
Focus (computing)
Firmware business.industry Computer science 0211 other engineering and technologies 021107 urban & regional planning 02 engineering and technology Reuse computer.software_genre 020202 computer hardware & architecture Embedded system VHDL 0202 electrical engineering electronic engineering information engineering Key (cryptography) Verilog business Field-programmable gate array computer Digital signal processing computer.programming_language |
| Zdroj: | EIT |
| DOI: | 10.1109/eit.2017.8053393 |
| Popis: | As FPGAs have grown ever larger, there has been a shift in the manner in which they are programmed. Early on, it was typical for designers to design all FPGA firmware in house using VHDL and Verilog. This gradually shifted towards design reuse at the IP Core Level. However in modern times, even designs at the IP level are having trouble adapting quickly enough to customer demands. This has resulted in a change in focus towards higher level languages such as OpenCL. A key aspect of OpenCL is it's standard library and specifically the math builtins of the standard library. This paper performs an in-depth analysis of the math functions in the OpenCL standard library and develops a framework to perform further analysis of library functions being implemented on FPGAs. |
| Databáze: | OpenAIRE |
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