Brief Announcement
| Autor: | Michael L. Scott, Hammurabi Mendes, Joseph Izraelevitz |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
010302 applied physics
Distributed shared memory Hardware_MEMORYSTRUCTURES Flat memory model Computer science Programming language Uniform memory access 02 engineering and technology Parallel computing computer.software_genre 01 natural sciences Memory map 020202 computer hardware & architecture Extended memory Memory management 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Interleaved memory Memory model computer |
| Zdroj: | SPAA |
| DOI: | 10.1145/2935764.2935810 |
| Popis: | Nonvolatile, byte-addressable memory (NVM) will soon be commercially available, but registers and caches are expected to remain transient on most machines. Without careful management, the data preserved in the wake of a crash are likely to be inconsistent and thus unusable. Previous work has explored the semantics of instructions used to push the contents of cache to NVM. These semantics comprise a "memory persistency model," analogous to a traditional "memory consistency model." In this brief announcement we introduce "explicit epoch persistency", a memory persistency model that captures the current and expected semantics of Intel x86 and ARM v8 persistent memory instructions. We also present a construction that augments any data-race-free program (for release consistency or any stronger memory model) in such a way that preserved data are guaranteed to represent a consistent cut in the happens-before graph of the program's execution. |
| Databáze: | OpenAIRE |
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