PMOS SiGe epitaxial growth process improvement to increase Yield and Throughput
| Autor: | Guozhen Yue, Vikas K Kaushal, Arvind Raviswaran, Rakesh C Mahadevapuram |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
0209 industrial biotechnology
Yield (engineering) Materials science Dopant business.industry 02 engineering and technology 021001 nanoscience & nanotechnology Epitaxy PMOS logic Silicon-germanium chemistry.chemical_compound 020901 industrial engineering & automation Reliability (semiconductor) chemistry Optoelectronics 0210 nano-technology business Throughput (business) Parametric statistics |
| Zdroj: | 2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC). |
| DOI: | 10.1109/asmc49169.2020.9185259 |
| Popis: | In this paper, we present the development of a new 14nm SiGe process that is designed to improve with-in-wafer uniformity to eventually improve Electrical parameters, parametric limited yield and overall average yield. In addition we showed that throughput has also improved. The methods presented involved adding cross-flows of same process gases and optimizing the flows, temperature, power and time. By doing so, significant improvement in the WIW uniformity (growth and dopant concentration) and improvement in Defects were observed. This WIW uniformity led to significant improvements in various Electrical Test parameters as well as yield. |
| Databáze: | OpenAIRE |
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