A Novel Teeth Junction Less Gate All Around FET for Improving Electrical Characteristics
| Autor: | Asisa Kumar Panigrahy, B. V. V. Satyanarayana, A. Arunkumar Gudivada, Caleb Meriga, Ravi Teja Ponnuri, M. Durga Prakash |
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| Rok vydání: | 2021 |
| Předmět: |
010302 applied physics
Materials science business.industry Transconductance Drain-induced barrier lowering 02 engineering and technology 021001 nanoscience & nanotechnology 01 natural sciences Electronic Optical and Magnetic Materials Threshold voltage 0103 physical sciences Optoelectronics Field-effect transistor 0210 nano-technology business Scaling |
| Zdroj: | Silicon. 14:1979-1984 |
| ISSN: | 1876-9918 1876-990X |
| DOI: | 10.1007/s12633-021-00983-y |
| Popis: | In this paper, we propose a novel “Teeth Junctionless Gate All Around Field Effect Transistor” (TH-JLGAA FET) based on gate engineering method, to obtain finer electrical characteristics. A 3 nm TH-JLGAA FET is designed and was scaled up to 14 nm to observe the effect of scaling on device performance. The characteristics are revealed and compared with contemporary JLGAA FETs. The results show that the novel TH-JLGAA FET appears to have finer Sub-thresholdSlope (SS), Drain Induced Barrier Lowering (DIBL), transconductance (gm), Ion/Ioff current ratio and threshold voltage roll-off. Moreover, these remarkable characteristics can be controlled by engineering the structure and volume of the gate. In addition, the sensitivities of the novel TH-JLGAA FET device with respect to structural parameters are probed. |
| Databáze: | OpenAIRE |
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